Table of Contents
Launching a CAD Tool in a Linux OS
These instructions are for users of our Sustainable Technology Configuration (STC), VCAD Cloud, and subscribers that want to set up Linux CAD software locally and link to our licence servers.
For each CAD tool, follow these steps:
- Source the Environment Shell Script, which is a *.csh file. The script file path of each tool can be found on the corresponding Tool Information table.
Enter the Launching Command to launch the tool. The command to launch each tool can be found on the corresponding Tool Information table. Some CAD tools have more than one launch command. The following is an example of starting Siemens’ Tanner layout editor in a terminal:
$ source /CMC/scripts/mentor.tanner.2023.2.csh
$ ledit
More about Linux Scripts
More information about Linux scripts and commands is available on these webpages:
Writing Scripts and Text Files for a Linux Operating Systems
Linux Operating Systems and CMC Microsystems CAD Software
CAD Tool Information
Altera FPGA tools (formerly Intel)
Supported operating systems: See vendor website here
| Tool Name | Version | README | Environment Shell Script | Launching Command | Starts On |
|---|---|---|---|---|---|
| Quartus | 22.1 | Includes NIOS II programs; may require certain 32-bit libraries | Under /CMC/scripts: intel.fpga.22.1.csh | quartus nios2-terminal nios2-gdb_server nios2-flash-programmer | RHEL 6 |
| Quartus Prime Pro | 22.3 23.1 24.1 | Release notes are here | Under /CMC/scripts/: intel.fpga.22.3.csh intel.fpga.24.1.csh | quartus nios2-terminal nios2-gdb_server nios2-flash-programmer | See Operating System Support |
Ansys Academic Research Suite: Electronics (HFSS, Q3D, Maxwell, SIwave)
See the supported operating systems.
| Tool Name | Version | READ ME/Installed | Environment Shell Script | Launching Command |
|---|---|---|---|---|
| Electronics Applications | 2023 R1 | Released in January, 2023. | Under /CMC/scripts/:ansys.23.1.csh | Desktop: ansysedt SIwave: siwave |
| Electronics Applications | 2023 R2 | Released in July, 2023. | Under /CMC/scripts/:ansys.23.2.csh | Desktop: ansysedt SIwave: siwave |
| Electronics Applications | 2024 R1 | Released in February, 2024. | Under /CMC/scripts/:ansys.24.1.csh | Desktop: ansysedt SIwave: siwave |
| Electronics Applications | 2024 R2 | Released in July, 2024 | Under /CMC/scripts/:ansys.24.2.csh | Desktop: ansysedt SIwave: siwave |
Ansys Academic Research Suite: Mechanical and CFD (Fluent, CFD/CFX, Icepak, Mechanical, Workbench)
See the supported operating systems.
| Tool Name | Version | READ ME/Installed | Environment Shell Script | Launching Command |
|---|---|---|---|---|
| Structures and Fluids Applications | 2023 R1 | Released in January, 2023. | Under /CMC/scripts/: ansys.23.1.csh | Workbench: runwb2 Fluent: fluent CFX: cfx5 MAPDL: mapdl (interactive command line) launcher231 (APDL launcher and GUI) ansys231 (interactive command line, distributed analysis) |
| Structures and Fluids Applications | 2023 R2 | Released in July, 2023. | Under /CMC/scripts/: ansys.23.2.csh | Workbench: runwb2 Fluent: fluent CFX: cfx5 Mechanical: We recommend running this tool through Workbench |
| Structures and Fluids Applications | 2024 R1 | Released in February, 2024. | Under /CMC/scripts/: ansys.24.1.csh | Workbench: runwb2 Fluent: fluent CFX: cfx5 Mechanical: We recommend running this tool through Workbench |
| Structures and Fluids Applications | 2024 R2 | Released in July, 2024. | Under /CMC/scripts/: ansys.24.2.csh | Workbench: runwb2 Fluent: fluent CFX: cfx5 Mechanical: We recommend running this tool through Workbench
|
Ansys Semiconductor Applications (RedHawk 3DX, PowerArtist XP)
See the supported operating systems.
| Tool Name | Version | README/Installed | Environment Shell Script | Launching Command |
|---|---|---|---|---|
| PowerArtist XP |
| As of February, 2024, CMC Microsystems no longer licenses the Ansys Semiconductor CAD software. |
|
|
| RedHawk 3DX |
| As of February, 2024, CMC Microsystems no longer licenses the Ansys Semiconductor CAD software. |
Cadence (excluding SPB, SIG and Fluids solvers)
Supported Operating Systems: See the platform support documents. Most Cadence tools run in Linux only.
| Tool Name | Version | README/Installed | Environment Shell Script (/CMC/scripts/) | Launching Command |
|---|---|---|---|---|
| ASSURA Physical Verification (ASSURA) | 04.15.102-5141 04.16.106-5141 04.16.107-618 04.16.110-618 04.16.111-618 04.16.115-231 | Integrated with Virtuoso AMS/custom design
| Under /CMC/scripts/: cadence.assura04.16.115-231.csh (Latest release on STC disk) | assura |
| Conformal Formal Verification (CONFRML) | 20.10.100/200 20.20.100/200 21.10.100 22.10.200/22.20.200 23.10.200/300 | Equivalence checker, from RTL to Place and Route (P & R). | Under /CMC/scripts/: cadence.confrml23.10.200.csh | Logic Equivalence Checker: lec |
| Conformal Litmus | 23.10.300 | Static timer integration for constraints and CDC signoff. Separate from Conformal Formal Verification. | Under /CMC/scripts/: cadence.litmus23.10.300.csh | litmus |
| Digital Design Implementation (DDI) | 23.11.000 23.12.000 | DDI is a single installation of Genus Synthesis, Innovus Implementation and Joules RTL Design Studio. Combined install introduced in the 22.1 release. | Under /CMC/scripts/: cadence.ddi23.11.000.csh cadence.ddi23.12.000.csh | Genus Synthesis: genus Innovus Implementation: innovus Joules RTL: joules |
| EMX (EMX/INTEGRAND) | 23.10 23.20 | From 2023, renamed/renumbered by Cadence staff. | Under /CMC/scripts/: cadence.emx23.10.000.csh cadence.emx23.20.000.csh | emx <options> To list options: emx –help |
| Genus Synthesis Solution (GENUS) | 20.10/11 21.10/12/15/17 From 2022/23: Now part of Digital Design Implementation (DDI). | GENUS is a Register-Transfer Level (RTL) synthesis and physical synthesis tool. | Under /CMC/scripts/: cadence.genus.21.17.000.csh | genus |
| Helium | 22.12 | For pre-silicon hardware/software co-verification. Requires Java to run. | Under /CMC/scripts/: cadence.helium22.12.002.csh | helium |
| Virtuoso IC618 (Base release in 2018) | IC06.18.* | Layout software | Under /CMC/scripts/: cadence.ic06.18.320.csh (Latest release on STC disk) | virtuoso |
| Virtuoso IC23 | IC23.000/010/050 | Layout software | Under /CMC/scripts/: cadence.ic23.10.050.csh (Latest release on the STC disk) | virtuoso |
| Virtuoso Advanced Node Framework (ICADVM20) | 20.10.260/270 | Contains individual point tools to handle complex interdependency of manufacturing and variability, power and performance specifications. | Under /CMC/scripts/: cadence.icadvm20.10.270.csh (Latest release on the STC disk) | virtuoso |
| Innovus Implementation System (INNOVUS) | 18.10/12 19.11/12/13/14/15/16 20.10/13/14 21.11/12/14/15/17 From 2022/23: Now part of Digital Design Implementation (DDI). | Use to determine optimal placement, wire length, utilisation, using the vendor’s NanoRoute engine. Co-operates with GENUS, should be installed together. | Under /CMC/scripts/: cadence.innovus21.17.000.csh (Latest release on STC disk) | innovus |
| Indago Embedded Software Debug Analyser (INDAGOMAIN) | 20.16.11.005 | Supports debugging of simulation runs and emulation | Under /CMC/scripts/: cadence.indagomain20.16.11.005.csh | indago |
| Integrand (EMX/INTEGRAND) | 62.10 63.10 For newer releases, see EMX entry in this table. | An EM solver that was acquired by Cadence in 2020. | Under /CMC/scripts/: cadence.integrand63.10.000.csh | emx |
| Jasper Verification (JASPERGOLD) | 23.06.000 23.09.002 | Formal and static timing verification and analysis. | Under /CMC/scripts/: cadence.jasper23.06.000.csh cadence.jasper23.09.002.csh | jaspergold |
JLS (Joules Library) Joules RTL Design Studio | 20.10 21.17/18 From 2022/23: Now part of Digital Design Implementation (DDI). | Under /CMC/scripts/: cadence.jls21.17.000.csh cadence.jls21.18.000.csh | joules | |
| Liberate Characterization Suite (LIBERATE) | 20.10.674 21.74/21.85 23.10 23.15.102 | Mixed-signal characterisation software. | Under /CMC/scripts/: cadence.liberate23.10.084.csh cadence.liberate23.15.102.csh | Liberate server: liberate <options> |
| Litho CMP Suite (MVS) | 20.11/22 21.10/11/12 | Design for Manufacturability (DFM) software. | Under /CMC/scripts/: cadence.mvs21.12.000.csh (Latest release on the STC disk) | Yield optimiser: cyao <file> Physical analyser: lpa <file> |
| Modus DFT/ATPG Option (MODUS) | 20.12 21.11 22.11 23.10 | Physically-aware Design for Testability (DFT) software. | Under /CMC/scripts/: cadence.modus22.11.000.csh cadence.modus23.10.000.csh | modus RTL Check_library: rcl |
Pegasus (PEGASUS) and Pegasus DFM (PEGASUSDFM) | Pegasus: 22.21/23 23.14/24 Pegasus DFM: 22.21 23.10/12/21 24.11 | Mask composition, design review and system verification software. | Under /CMC/scripts/: cadence.pegasus23.24.000.csh cadence.pegasusdfm.24.11.000.csh | Command line input: pegasus GUI interface: pegasusgui |
| Physical Verification System (PVS) | 20.10/11 21.12 | Final sign-off; constraint, in-design and backend verification, reliability checking. | Under /CMC/scripts/: cadence.pvs21.12.000.csh | Command line: pvs <options> GUI interface: pvsgui |
| Quantus QRC Suite (QUANTUS) | 20.11/12 21.11/20/22 22.11 23.11 | Parasitic extraction software for nodes as advanced as 3 nm, for both digital and custom designs | Under /CMC/scripts/: cadence.quantus23.11.000.csh | GUI interface: quantusui |
| Tempus and Voltus (SSV) | 20.10/20 21.12/14/17 22.12/16 23.10/12 | Tempus timing sign-off and Voltus power integrity sign-off software | Under /CMC/scripts/: cadence.ssv22.11.000.csh cadence.ssv23.12.000.csh | tempus voltus |
| Spectre Simulation Platform | 19.10 20.10 21.10 23.10 | SPICE simulator for Virtuoso ADE and AMS Designer | Under /CMC/scripts/: cadence.spectre23.10.063.csh cadence.spectre23.10.509.csh | spectre |
| Stratus (STRATUS) | 20.24.100 21.25.100 22.02.003 23.01.001/005 | High-level synthesis software | Under /CMC/scripts/: cadence.stratus23.01.001.csh cadence.stratus23.01.005.csh | Command line: stratus |
| Verisium Manager (VMANAGER, VMANAGERMAIN) | 20.03/09 21.03/09 22.09 23.03/09 From release 22.09, VMANAGER renamed Verisium Manager. | Uses machine learning (ML) and artificial intelligence to help with verification. For more | Under /CMC/scripts/: cadence.vmanagermain21.09.002.csh cadence vmanager23.09.002.csh | verisium <server location> |
| XCelium Logic Simulator | 19.* (legacy) 20.03/09 21.03/09 22.03/09 23.03/09 | Logic simulator for design simulation and debugging. Was originally INCISIV/Enterprise simulators. | Under /CMC/scripts/: cadence.xceliummain23.03.004.csh cadence.xceliummain23.09.006.csh | verisium |
Cadence Silicon Package Board (SPB), System Integrity (SIG) and Fidelity CFD Software
Supported Operating Systems: See the platform support documents.
Note: Not all *.csh shell scripts for each tool are listed. Search the /CMC/scripts/ directory on your STC disk to find the script for your preferred release.
| Tool Name | Version | README/Installed | Environment Shell Script (/CMC/scripts/) | Launching Command |
|---|---|---|---|---|
| Allegro PCB Suite (SPB) | 17.40.025 22.10.000/005 From 23.1, renamed “Allegro X Design Suite” | Information about this software here. | Under /CMC/scripts/: cadence.spb17.40.025.csh cadence.spb.22.1.csh cadence.spb.22.10.005.csh | allegro |
| Allegro X Design Platform (SPB) | 23.10.002 | https://www.cadence.com/en_US/home/tools/pcb-design-and-analysis/allegro-x-design-platform.html | Under /CMC/scripts/: cadence.spb23.10.002.csh | All Allegro choices: allegro Schematic capture: syscap |
| Fidelity and Fidelity Pointwise | 23.20 | https://www.cadence.com/en_US/home/tools/system-analysis/computational-fluid-dynamics/fidelity.html | Under /CMC/scripts/: cadence.pointwise23.20.002.csh | fidelity or pointwise |
| Fine/Marine | 12.10 | https://www.cadence.com/en_US/home/tools/system-analysis/computational-fluid-dynamics/fidelity/marine.html | cadence.finemarine12.10.004.csh | fine <version> |
| Sigrity/System Analysis Products (SIGRITY/SYSANLS) | 22.10.000 22.10.400 22.10.500 | Signal, power integrity and thermal simulations. Renamed the Sigrity/System Analysis bundle with the introduction of Celsius and Clarity. | Under /CMC/scripts/: cadence.sig22.10.500.csh (Latest release on our STC disk) | Clarity: xtractim 3D EM: clarity3dlayout Thermal: celsius |
| Sigrity X | 23.10.000 23.10.300 From 23.1, renamed “Sigrity X Platform” | https://www.cadence.com/en_US/home/tools/system-analysis/signal-and-power-integrity.html Sigrity X Platform is in-design signal and power integrity analysis for PCB and IC package designs. | Under /CMC/scripts/: cadence.sig23.10.000.csh | Celsius: celsius celsius2d celsius3d Clarity: clarity3dlayout clarity3dworkbench (many others; please consult Help manuals for details) |
COMSOL Multiphysics
Supported Operating Systems: See website for requirements
| Tool Name | Version | README/Installed | Environment Shell Script | Launching Command | Starts On |
|---|---|---|---|---|---|
| COMSOL | 6.0 | See website for Release Notes | Under /CMC/scripts: comsol.60.csh | comsol | See website for System Requirements |
| COMSOL | 6.1 | See website for Release Notes | Under /CMC/scripts/ comsol.61.csh | comsol | See website for System Requirements |
| COMSOL | 6.2 6.2 U1 | See website for Release Notes | Under /CMC/scripts/: comsol.62.csh comsol.62U1.csh | comsol | See website for System Requirements |
CoventorMP and MEMS+
See Supported Operating Systems.
| Tool Name | Version | README/Installed | Installed | Environment Shell Script | Launching Command | Starts On |
|---|---|---|---|---|---|---|
| Coventor | Latest release | See vendor’s websiteNote: This software will not be licensed beyond March, 2025. Contact cad@cmc.ca for assistance in this matter. | RHEL 7 and CentOS 7, 64-bit | $ source /CMC/scripts/coventorMP1.3.csh | $ MEMSp (always first launch the MEMS+ as it will set the variables) and then launch Coventor using following command.$ coventorware$ LayoutEditor1.0 | RHEL 7 and CenOS 7, 64-bit |
Keysight (formerly Agilent)
Supported Operating Systems: See the supported platforms.
| Tool Name | Version | Read Me/Installed | Environment Shell Script | Launching Command |
|---|---|---|---|---|
| Advanced Design System (ADS) | 2021 | Release notes are here. | Under /CMC/scripts/: keysight.ads.2021.csh | ads |
| Advanced Design System (ADS) | 2023 | Release notes are here. | Under /CMC/scripts/: keysight.ads.2023.csh | ads |
| Advance Design System (ADS) | 2024 | Release notes are here. | Under /CMC/scripts/: keysight.ads.2024.csh | ads |
| Advance Design System (ADS) | 2025 | Release notes are here. | Under /CMC/scripts/: <pending> | ads |
| EM Design (was previously called EMPro) | 2022 2023 2023 Update 2 | Release notes are here. | Under /CMC/scripts/: keysight.empro.2022.csh keysight.empro.2023.csh keysight.empro.2023.U0.2.csh | startempro or startempro –driver=x11 if no OpenGL installed |
| GoldenGate | 2017 | Release notes are here. | Under /CMC/scripts/: keysight.goldengate_ads.2017.csh or keysight.goldengate_virtuoso.2017.csh | Runs from Cadence Virtuoso CAD tool or from Keysight ADS |
| GoldenGate | 2020 | Release notes are here. | Under /CMC/scripts/: keysight.goldengate_ads.2020.csh | Runs from Cadence Virtuoso CAD tool or from Keysight ADS |
| RFIC Design (was previously called GoldenGate) | 2020 U1 | Release notes are here. | Under /CMC/scripts/: keysight.goldengate_ads.2020u1.csh or keysight.goldengate_virtuoso.2020u1.csh | Runs from Cadence Virtuoso CAD tool or from Keysight ADS |
| RFIC Design (was GoldenGate) | 2022 U1 | Release notes are here. | Under /CMC/scripts/: keysight.goldengate_ads.2022u1.csh or keysight.goldengate_virtuoso.2022u1.csh | Runs from Cadence Virtuoso CAD tool or from Keysight ADS |
| RFIC Design (was GoldenGate) | 2024 | Under /CMC/scripts/: <pending> |
Siemens EDA (Calibre)
Supported Operating Systems:
See the Calibre Platform Support Overview and Roadmap for more details.
Note: More information about the Calibre Manufacturing CAD tools is available here.
| Tool Name | Version | README | Environment Shell Script | Launching Command | Starts On |
| Calibre Design Solutions (aoi) | aoi_cal_2014.2_33.25 to aoi_cal_2024.1_36.20 | Uses the SSE3 CPU instruction set. Will be discontinued in 2024.3 | Under /CMC/scripts/: mentor.calibre.2024.1_36.20.aoi.csh | calibre -gui calibredrv calibrewb | See Calibre Platform Support Overview and Roadmap link above for details. |
| Calibre Design Solutions (aoj) | 2021.1 and later | Uses the AVX2 CPU instruction set. Introduced in 2021.1. | Under /CMC/scripts/: mentor.calibre.2024.3_37.19.aoj.csh | calibre -gui calibredrv calibrewb | See Calibre Platform Support Overview and Roadmap link above for details. |
| Calibre Design Solutions (aok) | 2021.1 and later | Calibre stream aok supported on RHEL 8. Uses the AVX2 CPU instruction set. Introduced in 2021.1. | Under /CMC/scripts/: mentor.calibre.2024.3_37.19.aok.csh | calibre -gui calibredrv calibrewb | RHEL 8 |
| Calibre Design Solutions (docs) | docs_cal_2008.* to docs_cal_2024.* | Calibre manuals for each associated release. Open either as PDF files or HTML webpages. | These files are not run using a shell script. |
Siemens EDA (Other tools)
- RHEL – Red Hat Enterprise Linux, 64-bit
- SLES – SUSE Linux Enterprise, 64-bit
| Tool Name | Version | README | Environment Shell Script | Launching Command | Starts On |
|---|---|---|---|---|---|
| Analog/Mixed-Signal (AMS Verification) | 2018.2 | Under /CMC/scripts/: mentor.amsv.2018.02.csh | Questa ADMS: vasim Eldo: eldo EZwave: ezwave ICAnalyst: ica | RHEL 6 and 7, 64-bit | |
| Analog/Mixed-Signal (AMSV) | 2022.4 2023.2_2 | https://eda.sw.siemens.com/en-US/ic/ic-custom/ams/design/ | Under /CMC/scripts/: mentor.amsv.2022_4.csh mentor.amsv.2023_2_2.csh | vasim <options> eldo <options> ezwave | RHEL 7 and 8 SLES 12, 15 |
| Catapult | 2022.2 (August, 2022) | High-level synthesis and verification using e.g. ANSI C++ and SystemC | On the STC disk under /CMC/scripts/: mentor.catapult.2022.2.csh | catapult | RHEL 7 and 8 |
| HDL Designer Series | 2020.2 | HDL design environment managing ASIC or FPGA designs in VHDL, Verillog and SystemVerilog. | /CMC/scripts/mentor.hds.2020.2.csh | hdl_designer | RHEL 7,8 |
| ModelSim | 2024.2 | Simulates behavioral, RTL, and gate-level code | Under /CMC/scripts/: mentor.modelsim_dlx_2024.2.csh | vsim | RHEL 7 and 8 Rocky 8 SLES 12, 15 |
| Precision RTL Synthesis | 2022.1 | FPGA synthesis using Verilog, VHDL and SystemVerilog langages | Under /CMC/scripts/: mentor.precision_2022.1.csh | GUI: precision Command line: precision -shell | RHEL 6, 7 and 8 |
| QuestaSim | 2020.1_1 | Advanced SystemVerilog and VHDL simulator | Under /CMC/scripts/: siemens.questasim.2022.1_2.csh | vsim | RHEL 6,7 |
| Tanner Custom IC tools | 2022.2 2023.2 | Runs using a Linux “Wine” compatibility layer; part of installation. | Under /CMC/scripts/: mentor.tanner.2022.2.csh mentor.tanner.2023.2.csh | Layout: ledit Schematic capture: sedit SPICE: tspice | RHEL 7, 8 |
| Tessent SiliconInsight | 2022.3 | An automated interactive environment for test bring-up, debug and silicon characterisation of devices. | Under /CMC/scripts/: mentor.tessent.2022.3.csh | Command line: fastscan To open GUI: etagui – server offline | For 2022: RHEL 7, 8.2 or later SLES 12, 15 |
Synopsys (except TCAD)
Supported Operating Systems:
| Tool Name | Version | README/Installed | Environment Shell Script | Launching Command |
|---|---|---|---|---|
| 3DIC Compiler | 2023.12 | https://www.synopsys.com/implementation-and-signoff/3dic-design.html | Under /CMC/scripts/: synopsys.3dic.2023.12.csh | Shell environment: 3dic_shell GUI: 3dic_shell -gui |
| Certitude | Functional qualification tool (code coverage) | Contact cad@cmc.ca for more information if interested. | ||
| coreTools | https://www.synopsys.com/designware-ip/ip-reuse-tool.html | Contact cad@cmc.ca for more information if interested. | ||
| Custom Compiler Apex | 2023.03-SP3 2023.12 | https://www.synopsys.com/implementation-and-signoff/custom-design-platform/custom-compiler.html Full-custom digital, analog and mixed-signal design. product tier to support new advanced technologies for 3DIC, photonics, power devices | Under /CMC/scripts/: synopsys.customcompiler.2023.03-3.csh synopsys.customcompiler.2023.12.csh | Command line: cc <input_file> GUI: custom_compiler custom_shell |
| Custom WaveView | 2017 2022.06-SP2-2 2023.12 | Graphical waveform viewer and analyser. | Under /CMC/scripts/: synopsys.wv.2022.06-SP2-2.csh synopsys.wv.2023.12.csh | wv |
| Design Compiler Elite | 2022.12 | https://www.synopsys.com/implementation-and-signoff/rtl-synthesis-test/dc-ultra.html | Under /CMC/scripts/: synopsys.syn.2022.12.csh | Command line: dc_shell GUI: design_vision |
| Custom WaveView | 2017 2022.06-SP2-2 2023.12 | Graphical waveform viewer and analyser. | Under /CMC/scripts/: synopsys.wv.2022.06-SP2-2.csh synopsys.wv.2023.12.csh | wv |
| Design da Apex | 2022.12 | New to the Americas University bundle for 2024. DesignDash Apex license enables metrics capture and visualization, extensive design analytics and visualization, predictive and prescriptive analytics for digital implementation and signoff design activities. | Contact cad@cmc.ca for more information if interested. | |
| DesignWare Developer | Tool for generation of user-defined DesignWare components. | Contact cad@cmc.ca for more information if interested. | ||
| ESP Elite | https://www.synopsys.com/implementation-and-signoff/signoff/esp.html ESP Elite is a symbolic simulation-based logic equivalence checker capable of handling Verilog (behavioral, RTL, gate, switch), .db, and spice netlists. It also has in-built verification functions for transistor-level checks. | Contact cad@cmc.ca for more information if interested. | ||
| Euclide Elite and Testbench Lint Batch Add-on | https://www.synopsys.com/verification/ide/euclide.html Interactive on-the-fly RTL and Testbench Lint checks in an Integrated Development Environment (IDE). | Contact cad@cmc.ca for more information if interested. | ||
| Formality ECO Elite | 2022.12-SP3 2023.12 | https://www.synopsys.com/implementation-and-signoff/signoff/formality-equivalence-checking.html Equivalence-checking software | Under /CMC/scripts: synopsys.fm.2022.12-SP3.csh synopsys.fm.2023.12.csh | Command line: fm_shell GUI: fm_shell -gui |
| Fusion Compiler Elite | 2022.12-SP3 2023.12 | https://www.synopsys.com/implementation-and-signoff/physical-implementation/fusion-compiler.html Provides a complete RTL2GDS solution for 5/4 nm designs and above. | Under /CMC/scripts/: synopsys.fusioncompiler.2022.12-SP3.csh synopsys.fusioncompiler.2023.12.csh | Command line: fc_shell GUI: fc_shell -gui |
| GenSys Base | 2022.12 | https://www.synopsys.com/implementation-and-signoff/rtl-synthesis-test/gensys.html RTL-based chip assembly and restructuring | Under /CMC/scripts/: synopsys.gensys.2022.12.csh | GUI: gensys |
| Helix | New in the Americas University bundle for 2024. Device-level placement for custom IC design. | Contact cad@cmc.ca for more information if interested. | ||
| IC Compiler II Elite | 2021.06-SP5 2022.12 | https://www.synopsys.com/implementation-and-signoff/physical-implementation/ic-compiler.html IC Compiler II Elite enables full netlist to GDS flow for >4nm process technology including placement, CTS, Routing, and Optimization engines. Machine Learning and Advanced Fusion technologies are included. | Under /CMC/scripts/: synopsys.icc2.2022.12.csh synopsys.icc2.2023.12.csh | Command line: icc2_shell GUI: icc2_shell -gui lm_shell (library manager) |
| IC Validator Apex | 2022.12 2023.12 | https://www.synopsys.com/implementation-and-signoff/physical-verification.html Signoff DRC or LVS checking (not simultaneous). | Under /CMC/scripts/: synopsys.icvalidator.2022.12.csh synopsys.icvalidator.2023.12.csh | icv |
| Laker: Apex | Laker Apex provides advanced layout editing with additional productivity features. | Contact cad@cmc.ca for more information if interested. | ||
| Library Compiler | 2022.12 2023.12 | Tool to prepare and qualify both logic libraries and physical libraries. | Under /CMC/scripts/: synopsys.lc.2022.12.csh synopsys.lc.2023.12.csh | Command line: lc_shell GUI: lc_shell -gui |
| Milkyway Environment | 2022.12 2023.12 | Physical device library | Under /CMC/scripts/: synopsys.mw.2022.12.csh synopsys.mw.2023.12.csh | GUI: Milkyway |
| NanoTime Base and Memory Add-On | 2022.12-SP3 2023.12 | https://www.synopsys.com/implementation-and-signoff/signoff/nanotime.html Enables transistor level STA (Timing, SI, Noise), characterization of custom digital, memories, and AMS macros. | Under /CMC/scripts/: synopsys.nt.2022.12-SP3.csh synopsys.nt.2023.12.csh | Command line: nt_shell |
| PrimeClosure Apex | New in the Americas University bundle for 2024. Includes technologies to provide the best PPA and QoR for signoff ECO. | Contact cad@cmc.ca for more information if interested. | ||
| PrimeLib | 2022.03-SP1 | https://www.synopsys.com/implementation-and-signoff/signoff/primelib.html Provides fast library characterization with golden signoff accuracy, cloud optimized for 100k jobs, SmartScaling for multi-PVT, advanced modeling for LVF, POCV, Aging, EM, and integrated validation | Under /CMC/scripts/: synopsys.primelib.2022.03-SP1.csh | Command line: primelib |
| PrimePower Elite | https://www.synopsys.com/implementation-and-signoff/signoff/primepower.html and https://www.synopsys.com/verification/simulation/powerreplay.html | Under /CMC/scripts/: synopsys.prime.2019.12-SP2.csh synopsys.powrep.2023-SP1.csh | Command line: pwr_shell powrep GUI: primepower | |
| PrimeShield Base | New to the Americas University bundle for 2024. Performs fast Monte Carlo statistical simulation on critical timing paths with HSPICE accuracy, enabling analysis and optimisation on large-scale SoCs with billions of cells, | Contact cad@cmc.ca for more information if interested. | ||
| PrimeSim Continuum | Several versions | https://www.synopsys.com/implementation-and-signoff/ams-simulation/primesim-hspice.html Circuit simulation using foundry-certified models | Under /CMC/scripts/: synopsys.hspice.2023.12-SP2-2.csh synopsys.primesim.2023.12-SP2-2.csh | Command line: hspice |
| PrimeTime Suite | 2022.12 | https://www.synopsys.com/implementation-and-signoff/signoff/primetime.html Static timing analysis | Under /CMC/scripts/: synopsys.prime.2022.12.csh | Command line: pt_shell GUI: primetime |
| PrimeWave Design Environment Elite | 2023.03 2023.12-SP1 | https://www.synopsys.com/implementation-and-signoff/ams-simulation/primewave.html | Under /CMC/scripts/: synopsys.primewave.2023.03 synopsys.primewave.2023.12SP1.csh | PrimeWave GUI: primewave Custom Infrastructure GUI: custom_shell |
| QuickCap Elite, Inductance Add-On | https://www.synopsys.com/implementation-and-signoff/signoff/quickcap-nx.html | Contact cad@cmc.ca for more details. | ||
| Saber, Apex | 2022.03 | https://www.synopsys.com/verification/virtual-prototyping/saber.html Design, model and simulate physical systems. In the Americas University bundle for 2024, users are asked to migrate to Saber Apex. | Under /CMC/scripts/: synopsys.saber.2022.03.csh … and: synopsys.saberhdl_simulator.2022.03.csh | saber (Simulator) sketch (Sketch) saberbook scope (CosmosScope) sst (Statistical; command line) vmake (command line) saberhdl (command line) |
| Silver Simulation and Regression | Build virtual Electronic Control Units (ECUs) that closely mimic the behavior of their real counterparts. | Contact cad@cmc.ca for more information if interested. | ||
| StarRC Apex, Custom Add-On, Digital Add-On | 2022.12-SP1 | https://www.synopsys.com/implementation-and-signoff/signoff/starrc.html Signoff extraction for digital, custom, and 3DIC designs, 3nm and above. | Under /CMC/scripts/: synopsys.starrc.2022.12-SP1.csh | Command line: starrc_shell |
| Synplify Apex | https://www.synopsys.com/implementation-and-signoff/fpga-based-design/synplify.html | Under /CMC/scripts/: synopsys.fpga.2023.03.csh | synplify_apex | |
| Synopsys Installer | (Latest is 5.7) | Required to perform most Synopsys Linux-based software installations | Feature | |
| TestMax | 2022.12-SP3 2023.12 | https://www.synopsys.com/implementation-and-signoff/test-automation.html In the Americas University bundle for 2024, TestMAX includes: Access; Advisor; ALE; DFT; Diagnosis; SMS; Vtran; and XLBIDST. | Under /CMC/scripts/: synopsys.tx.2022.12-SP1.csh | Command line: dft_shellGUI: dft_shell -gui |
| TestWeaver | https://www.synopsys.com/verification/virtual-prototyping/virtual-ecu/testweaver.html TestWeaver enables test automation, Requirement Modeling Language and basic parameter exploration with Silver and Virtualizer (when integration is released). | Contact cad@cmc.ca for more information if interested. | ||
| Timing Constraints Manager Apex | New in the Americas University bundle for 2024. Used to specify SoC/IP performance requirements and to guide implementation tools to meet these requirements. | Contact cad@cmc.ca for more information if interested. | ||
| VC Execution Manager, Functional Safety Manager, ML Platform, VIP Protocol Portfolio, VIP SOC Library | https://www.synopsys.com/verification/soc-verification-automation/vc-execution-manager.html | Contact cad@cmc.ca for more information if interested. | ||
| VC Static and Formal Platform | vS-2021; 2022.06-SP2-1 | https://www.synopsys.com/verification/static-and-formal-verification.html Functional verification using constraints and performance simulation. | Under /CMC/scripts/: synopsys.vc_static.2022.06-SP2-2.csh (Latest release on the STC disk) | vc_static_shell -mode64 |
| VC Formal Elite | https://www.synopsys.com/verification/simulation/vc-z01x.html Concurrent fault simulator used to deterministically measure fault coverage of a design and its related safety mechanisms. Simulates and injects stuck-at and transient faults in gate-level, switch-level, RTL, and behavioral descriptions of designs. The tool provides a wide range of features including statistical sampling, stimulus support for SystemVerilog testbenches , eVCD files, and flexible fault detection through strobing system tasks. | Contact cad@cmc.ca for more information if interested. | ||
| VCS | vV-2023.12 | https://www.synopsys.com/verification/simulation/vcs.html Functional verification simulation tool; works with Verdi for debug. | Contact cad@cmc.ca for more information if interested. | |
| Verdi Apex | 2022.06-SP2 2023.03-SP1 | https://www.synopsys.com/verification/debug/verdi-hw-sw-debug.html Advanced Verdi debug for simulation, static, and formal flows. | Under /CMC/scripts/: synopsys.verdi.2022.06-SP2.csh | GUI: verdi |
| Virtual Prototyping | https://www.synopsys.com/verification/virtual-prototyping.html Provides a complete solution to create, distribute and use virtual prototypes, which are fast, fully functional software models of systems that execute unmodified production code and provide higher debugging and analysis efficiency to users. | Contact cad@cmc.ca for more information if interested. | ||
| ZeBu Continuum Software | https://www.synopsys.com/verification/emulation.html Complete solution to develop hybrid prototypes, which combine a Virtual Prototype with hardware emulation. It supports both the Synopsys Virtualizer and Platform Architect virtual prototyping products. Note: In the 2024 Americas University bundle, this software has been dropped. | Contact cad@cmc.ca for more information if interested. | Command line: vcs |
Notes:
- Contact CMC Microsystems staff for a list of the University program software: cad@cmc.ca:
Synopsys (TCAD, QuantumATK, Photonics)
Supported Operating Systems: See the platform support documents. See the complete list of Synopsys software including TCAD/QATK.
| Tool Name | Version | READ ME | Environment Shell Script | Launching Command |
|---|---|---|---|---|
| IC Validator Elite | Under /CMC/tools/synopsys/: 2022.03-1 2022.12 | Signoff DRC or LVS checking (not simultaneous). Includes all features of ICV Base (Multi Patterning, Pattern Matching, FILL, and unlimited sessions of VUE). In addition, ICV Elite enables new technologies such as Explorer, and PERC. | Latest version under /CMC/scripts/: synopsys.icvalidator.2022.12.csh | Command line: icv |
| IC Validator Workbench | Under /CMC/tools/synopsys/: 2020.09 2022.03 2022.12 | Latest release: GDS layout editor for the TCAD tools; Windows version also available. Consult the training tutorials provided with Sentaurus to learn more about this software. | Latest version under /CMC/scripts/: synopsys.icv_workbench.2022.12.csh | GUI: icvwb |
| OptoCompiler | For 2024, OptoCompiler Base features are available. | https://www.synopsys.com/photonic-solutions/optocompiler.html | Contact cad@cmc.ca for more information if interested. | |
| OptoDesigner | 2023.12SP1 | Under /CMC/scripts/: synopsys.photonicsolutions.2023.12SP1.csh | GUI: For OptoDesigner OptoDesigner For OptSim optsim | |
| PS RSoft Photonic Device Tools | 2023.03 2023.12-SP1 | https://www.synopsys.com/photonic-solutions/rsoft-photonic-device-tools/rsoft-products.html | Under /CMC/scripts/: synopsys.photonicsolutions.2023.03.csh | RSoft CAD tools: bcad |
| QuantumATK | Under /CMC/tools/synopsys/: 2021.06 2022.03 2023.09 | Information about this software here. | Under /CMC/scripts/: synopsys.quantumatk.2021.06.csh synopsys.quantumatk.2022.03.csh synopsys.quantumatk.2023.09.csh | quantumatk |
| Raphael | Under /CMC/tools/synopsys/: 2021.06 2022.03 | For extracting 2D and 3D resistance, capacitance and inductance, to optimise on-chip parasitics for multi-level interconnect structures in small cells. Only release in 2021. As of release 2020.09a, Raphael no longer runs with a GUI interface. | Under /CMC/scripts/: synopsys.raphael.2021.06.csh synopsys.raphael.2022.03.csh | raphael |
| Raphael and Raphael FX | Under /CMC/tools/synopsys/: 2022.12 2023.12 | New form for this extraction tool. Both run from the command line. Information about this software here. | Under /CMC/scripts/: synopsys.raphael.2022.12.csh synopsys.raphael.2023.12.csh and synopsys.raphael_fx.2022.12.csh synopsys.raphael_fx.2023.12.csh | raphael or raphael_fx |
| Sentaurus | Under /CMC/tools/synopsys/: 2022.03 2022.03-SP2 2022.12 2023.09 2023.12 2024.09 | Information about this software here. | Under /CMC/scripts/: synopsys.sentaurus.2022.03.csh synopsys.sentaurus.2022.03-SP2.csh synopsys.sentaurus.2022.12.csh synopsys.sentaurus.2023.09.csh synopsys.sentaurus.2023.12.csh synopsys.sentaurus.2024.09.csh | swb (Workbench) sprocess (Process) sdevice (Device) sde (Structure Editor) svisual (graphing window) inspect (graphing window)
|
| Silicon WorkBench | Information about this software here. | Appears to be a replacement for IC Validator WorkBench, starting in 2023. | Under /CMC/scripts/: synopsys.siwb.2024.09.csh | siwb |
S-Litho Base S-Metro | Information about this software here. | Contact cad@cmc.ca for more information if interested. | ||
| Taurus Medici | (removed in 2024) | In the 2024 Americas University Tools bundle, Taurus Medici has been removed and replaced by Sentaurus Device. To ask about this change, please contact cad@cmc.ca. | ||
| Taurus TSUPREM4 | (removed in 2024) | In the 2024 Americas University Tools bundle, Taurus TSUPREM4 has been removed and replaced by Sentaurus Process. To ask about this change, please contact cad@cmc.ca. |
AMD Xilinx
Supported Operating Systems: See the list of supported operating systems for Vivado.
| Tool Name | Version | README/Installed | Environment Shell Script | Launching Command |
|---|---|---|---|---|
| ISE_DS | 14.7 | Released in 2014. | Under /CMC/scripts/: xilinx.14.7.csh | ise |
| Vitis | 2023.1 2023.2.1 | See web page here. | Under /CMC/scripts/: xilinx.vitis.2023.1.csh (Latest release on the STC disk) | vitis |
| Vivado | 2023.1 2023.2 | Latest release on the STC disk. Support videos and references here. | Under /CMC/scripts/: xilinx.vivado.2023.1.csh or xilinx.vivado.2023.2.1.csh | vivado |